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Zynq UltraScale+ MPSoC for the System Architect
This content provides system architects with an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family. The emphasis is on Utilizing power management strategies effectively, Leveraging the pl...

Classroom - Designing with DFX Using the Vivado Design Suite
Learn how to construct, implement, and download aDynamic Function eXchange (DFX) FPGA design using the Vivado® Design Suite.This course covers both the tool flow and mechanics of successfully creating aDFX design. &nb...

Classroom - Accelerating Applications with the Vitis Unified Software Environment
Learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™ unified software environment targeting both data center (DC) and embedded applications. Also learn how to run designs o...

Classroom - Advanced Features and Techniques of Embedded Systems Software Design
Software design engineers will learn how to make full use of the components available in the Zynq® System on a Chip (SoC) processing system (PS).The course provides experience with:Implementing an effective Zynq SoC b...

Classroom - C-based HLS Coding for Hardware Designers
C-based coding is increasingly used for the modeling and high-level synthesis of hardware components. This course provides hardware engineers with sufficient knowledge of C-programming techniques for Vivado HLS to tak...

Classroom - Designing an Integrated PCI Express System
Learn how to implement a Xilinx PCI Express® core in custom applications to improve time to market with the PCIe® core design.The focus is on:Constructing a Xilinx PCI Express system within the customer education refe...

Classroom - Designing FPGAs Using the Vivado Design Suite 2
Learn how to build a more effective FPGA design:The focus is on:Using synchronous design techniquesUtilizing the Vivado® IP integrator to create a sub-systemEmploying proper HDL coding techniques to improve design per...

Classroom - Designing with Ethernet MAC Controllers
Become acquainted with the various solutions that Xilinx offers for Ethernet connectivity.The course covers:Learning the basics of the Ethernet standard, protocol, and OSI modelPerforming simulation to understand fund...

Classroom - Designing with Multi-Gigabit Serial I/O
Learn how to employ serial transceivers in 7 series designs.The focus is on:Identifying and using the features of the serial transceiver blocks, such as 8B/10B and 64B/66B encoding, channel bonding, clock correction, ...

Classroom - Designing with the UltraScale and UltraScale+ Architectures
Introduces the UltraScale™ and UltraScale+™ architectures to both new and experienced designers.The emphasis is on:Introducing CLB resources, clock management resources (MMCM and PLL), global and regional clocking res...