DesignProcessForm | Xilinx Customer Learning Center

CURRICULUM BY DESIGN PROCESS

In this curriculum path, you will learn how to create Versal AI Engine graphs and kernels. Library use, simulation debugging and profiling, and algorithm development are also covered, as well as the integration of programmable logic (PL) and AI Engine kernels.

Courses

Designing with Versal AI Engine 1 - Architecture and Design Flow

This content describes the Versal™ AI Engine architecture, how to program the AI Engines (single kernel programming and multiple kernel programming using data flow graphs), the data communications between the PL and A...

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Designing with Versal AI Engine 2 - Graph Programming with AI Engine Kernels

This content describes the system design flow and interfaces that can be used for data movements in the Versal™ AI Engine. It also demonstrates how to utilize the advanced MAC intrinsics, AI Engine library for faster ...

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Designing with Versal AI Engine 3: Kernel Programming and Optimization

This content covers the advanced features of the Versal® ACAP AI Engine, including debugging an application in the Vitis™ unified software platform, using filter intrinsics, implementing a system design in hardware, a...