Xilinx is now part ofAMDUpdated Privacy Policy
Versal ACAP: PCIe Block Completer Interfaces
Reviews the completer AXI4-Streaming core interfaces. You will learn how to utilize packet descriptors for completion interfaces.
{Lecture, Lab}
Updated 9.2021
1 . Versal ACAP: PCIe Block Completer Interfaces
2 . Defining PCIe Transactions in Descriptor Format - Lab
Questions?