Virtual - Xilinx Partial Reconfiguration Tools and Techniques
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Learn how to construct, implement, and download a Partially Reconfigurable (PR) FPGA design using the Vivado® Design Suite. This course covers both the tool flow and mechanics of successfully creating a PR design.
The emphasis is on:
  • Identifying best design practices and understanding the subtleties of the PR design flow
  • Using the PR controller and PR decoupler IP in the PR process
  • Implementing PR in an embedded system environment
  • Applying appropriate debugging techniques on PR designs
  • Employing best practice coding styles for a PR system
View the course description PDFfor more details.

3/17/2021 - 3/18/2021
Time Zone : (GMT-05:00) Eastern Time (US & Canada)
Seats Remaining : 9
Venue : Online - Hardent
Address : Hardent,Live Online
4/12/2021 - 4/16/2021
Time Zone : (GMT-08:00) Pacific Time (US & Canada)
Seats Remaining : 16
Venue : Online - Doulos Ltd
Address :
7/20/2021 - 7/21/2021
Time Zone : (GMT-08:00) Pacific Time (US & Canada)
Seats Remaining : 20
Venue : To Be Determined
Address :