Virtual - Designing with the UltraScale and UltraScale+ Architectures

Introduces the UltraScale™ and UltraScale+™ architectures to both new and experienced designers.

The emphasis is on:

Introducing CLB resources, clock management resources (MMCM and PLL), global and regional clocking resources, memory and DSP resources, and source-synchronous resources
Describing improvements to the dedicated transceivers and Transceiver Wizard
Reviewing the Memory Interface Generator (MIG) and DDR4 memory interface capabilities
Migrating existing designs and IP to the UltraScale architecture with optimal use of the Vivado® Design Suite

View the course description PDF for more details.

11/9/2021 - 11/12/2021
Time Zone : (GMT-08:00) Pacific Time (US & Canada)
Seats Remaining : 16
Venue : Online - Doulos Ltd
Address :

11/15/2021 - 11/18/2021
Time Zone : (GMT-08:00) Pacific Time (US & Canada)
Seats Remaining : 16
Venue : Online 2 - Doulos Inc
Address :

12/1/2021 - 12/2/2021
Time Zone : (GMT-05:00) Eastern Time (US & Canada)
Seats Remaining : 8
Venue : Online - Hardent
Address : Live Online - Hardent