Classroom - Designing with the Zynq UltraScale+ RFSoC
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Provides an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family with a special emphasis on the Data Converter and Soft-Decision FEC blocks.
The focus is on:
  • Describing the RFSoC family in general
  • Identifying applications for the Data Converter and SD-FEC blocks
  • Configuring, simulating, and implementing the blocks
  • Reviewing power estimation to help identify the power demands of the RFSoC device in various operating modes
  • Identifying proper layout and PCB considerations since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device
View the course description PDF for more details.

2/8/2021 - 2/10/2021
Time Zone : (GMT+01:00) Brussels, Copenhagen, Madrid, Paris
Seats Remaining : 12
Venue : ESP, Madrid - Universidad Autonoma de Madrid
Address : Fco Tomas y Valiente 11,School of Engineering,Madrid,SPAIN