Classroom - Introduction to the Zynq SoC Architecture
Provides hardware and firmware engineers with the knowledge on how to best architect a Zynq® System on a Chip (SoC) device project.
This course covers:
  • Describing the architecture of the ARM® Cortex™-A9 processor-based processing system (PS) and the integration of programmable logic (PL)
  • Detailing the individual components that comprise the PS: I/O peripherals, timers, caching, DMA, interrupt, and memory controllers
  • Effectively accessing and using the PS DDR controller from PL user logic
  • Interfacing PL-to-PS efficiently
  • Employing best practice design techniques for implementing functions in the PS or PL
View the course description PDF for more details.

11/9/2021 - 11/10/2021
Time Zone : (GMT+09:00) Seoul
Seats Remaining : 10
Venue : To Be Determined
Address :
12/14/2021 - 12/15/2021
Time Zone : (GMT+09:00) Seoul
Seats Remaining : 10
Venue : To Be Determined
Address :