Virtual - Versal Architecture Essentials (PLC2 version)
With Versal, Xilinx offers the first highly integrated chip series in the new ACAP family - Adaptive Compute Acceleration Platform. The Versal Chips have a heterogeneous architecture with MPSoC, FPGA, PCIe Connectivity, Memory Management, DSP Engines and AI Engines, which in particular enable software and DSP applications to be parallelized and partitioned in hardware to enable the optimal hardware units usage for the specific task.
In this workshop you will be familiarized with the architecture in order to be able to use the building blocks optimally for demanding tasks.
Versal offers multi-processing in SMP and AMP, vector based parallel processing using the AI engines, DSP engines also supporting floating point and as adaptable platform programmable logic (PL) in UltraScale+ technology.
The technical features and optimal use of the components are described in order to compile software and hardware functions on specific hardware units.

7/18/2022 - 7/19/2022
Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna
Seats Remaining : 12
Venue : Online - PLC2
Address :