Virtual - Designing with the Versal ACAP: Network on Chip
This course introduces the Versal™ ACAP network on chip (NoC) to users familiar with Xilinx devices. Besides providing an overview of the major components in the Versal device, the course illustrates how the NoC is used to efficiently move data within the device. The emphasis of this course is on:

▪ Enumerating the major components comprising the NoC architecture in the Versal ACAP
▪ Implementing a basic design using the NoC
▪ Configuring the NoC for efficient data movement 

11/9/2021 - 11/9/2021
Time Zone : (GMT-05:00) Eastern Time (US & Canada)
Seats Remaining : 13
Venue : Online - BLT - $299 per day
Address : www.bltinc.com
11/12/2021 - 11/12/2021
Time Zone : (GMT+09:00) Osaka, Sapporo, Tokyo
Seats Remaining : 12
Venue : Online HDLAB2
Address : 3-17-6 Shin-Yokohama, Kohoku-ku,Yokohama, Kanagawa,JAPAN
11/30/2021 - 11/30/2021
Time Zone : (GMT-05:00) Eastern Time (US & Canada)
Seats Remaining : 10
Venue : Online - Hardent
Address : Live Online - Hardent
1/26/2022 - 1/26/2022
Time Zone : (GMT-05:00) Eastern Time (US & Canada)
Seats Remaining : 10
Venue : Online - Hardent
Address : Live Online - Hardent
3/22/2022 - 3/22/2022
Time Zone : (GMT-05:00) Eastern Time (US & Canada)
Seats Remaining : 0
Venue : Online - BLT - $299 per day
Address : www.bltinc.com