Classroom - Designing with the Versal ACAP: Network on Chip
This course introduces the Versalâ„¢ ACAP network on chip (NoC) to users familiar with Xilinx devices. Besides providing an overview of the major components in the Versal device, the course illustrates how the NoC is used to efficiently move data within the device.
The emphasis of this course is on:
  • Enumerating the major components comprising the NoC architecture in the Versal ACAP
  • Implementing a basic design using the NoC
  • Configuring the NoC for efficient data movement

11/18/2021 - 11/18/2021
Time Zone : (GMT+01:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna
Seats Remaining : 6
Venue : NLD - Heesch - CoreVision Headquarters
Address : Cereslaan 10b,Heesch,THE NETHERLANDS