UltraFast Design Methodology

Course Details

Length: 22 Hours

Number of Labs: 8

Number of Chapter: 28

Current Version: 2021.2

Number of Demos: 3

Overview

Learn how to improve design speed and reliability by using the UltraFast Design Methodology and the Vivado® Design Suite.

The focus is on:

Optimizing system reset design and synchronization circuits
Employing best practice HDL coding techniques
Applying appropriate timing closure techniques
Reviewing an UltraFast Design Methodology case study

Updated 1.2022 - v2021.2

CHAPTERS

UltraFast Design Methodology - Introduction

UltraFast Design Methodology - Board and Device Planning

UltraFast Design Methodology - Design Creation

UltraFast Design Methodology - Implementation

UltraFast Design Methodology - Design Closure

HDL Coding Techniques

Incremental Compile Flow

Resets

Register Duplication

Pipelining

Synchronous Design Techniques

Baselining

Synchronization Circuits (UFDM)

Introduction to Vivado Reports

Revision Control Systems in the Vivado Design Suite Introduction

Xilinx Power Estimator Spreadsheet

Power Management Techniques

Vivado Synthesis and Implementation Introduction

Creating and Packaging Custom IP Introduction

Designing with the IP Integrator

Vivado Design Suite I/O Pin Planning

Introduction to Timing Exceptions

Timing Closure Using Physical Optimization Techniques

Introduction to Floorplanning

Congestion

Introduction to FPGA Configuration

Vivado Design Suite Debug Methodology

UltraFast Design Methodology Full Course Quiz

OTHER FORMATS

On Demand Trainings

Virtual Classroom

Live Classroom

USD Price = 199

Training Credit Price = 2 TC

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