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Designing with the Versal ACAP: Architecture and Methodology
Designing with the Versal ACAP: Architecture and Methodology
Course Details
Length:
34 Hours
Number of Labs:
10
Number of Chapter:
29
Current Version:
2022.1
Number of Demos:
0
Overview
This content helps you to learn about Versal® ACAP architecture and design methodology.
Updated 6.2022 - v2022.1
CHAPTERS
Versal ACAP: Introduction
Versal ACAP: Architecture Overview
Versal ACAP: Design Tool Flow
Versal ACAP: Adaptable Engines (PL)
Versal ACAP: Processing System
Versal ACAP: PMC and Boot and Configuration
Versal ACAP: SelectIO Resources
Versal ACAP - Clocking Architecture
Versal ACAP: System Interrupts
Versal ACAP: Timers, Counters, and RTC
Versal ACAP: Software Build Flow
Versal ACAP: Software Stack
Versal ACAP: DSP Engine
Versal ACAP: AI Engine
Versal ACAP: NoC Introduction and Concepts
Versal ACAP: Device Memory
Versal ACAP: Programming Interfaces
Versal ACAP: Application Partitioning
Versal ACAP: PCI Express & CCIX
Versal ACAP: Serial Transceivers
Versal ACAP: Power and Thermal Solutions
Versal ACAP: Debugging
Versal ACAP: Security Features
Versal ACAP: System Simulation
Versal ACAP - Board System Design Methodology
Versal ACAP - System and Solution Planning Methodology
Versal ACAP - Hardware, IP, and Platform Development Methodology
Versal ACAP - System Integration and Validation Methodology
Designing with the Versal ACAP: Architecture and Methodology Full Course Quiz
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USD Price = 299
Training Credit Price = 3 TC
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