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High-Level Synthesis with the Vitis HLS Tool
High-Level Synthesis with the Vitis HLS Tool
Course Details
Length:
26 Hours
Number of Labs:
11
Number of Chapter:
22
Current Version:
2021.2
Number of Demos:
4
Overview
This content provides a thorough introduction to the Vitis™ High-Level Synthesis (HLS) tool.
Updated 1.2022 - v2021.2
CHAPTERS
Introduction to High-Level Synthesis
Vitis HLS Tool Flow
Design Exploration with Directives
Vitis HLS Tool Command Line Interface
Introduction to Vitis HLS Methodology
Introduction to I/O Interfaces
Block-Level Protocols
Port-Level I/O Protocols
AXI Adapter Interface Protocols
Port-Level I/O Protocols Memory Interfaces
Pipeline for Performance - PIPELINE
Pipeline for Performance - DATAFLOW
Optimizing for Throughput
Optimizing for Latency Default Behavior
Optimizing for Latency - Reducing Latency
Optimizing for Area and Logic
Migrating to the Vitis HLS Tool
HLS Design Flow – System Integration
Vitis HLS Tool C++ Libraries: Arbitrary Precision
Hardware Modeling
Using Pointers in the Vitis HLS Tool
High-Level Synthesis with the Vitis HLS Tool Full Course Quiz
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USD Price = 199
Training Credit Price = 2 TC
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