Designing with the Zynq UltraScale+ RFSoC
Course Details
Length: 32 Hours
Number of Labs: 18
Number of Chapter: 9
Current Version: 2021.1
Number of Demos: 5


This content is structured to provide designers with an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family. Special emphasis is placed on the Data Converter and Soft-Decision FEC blocks.
Power estimation is covered to help designers identify the power demands of the device in various operating modes. Since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device, proper layout and PCB considerations are also covered.
Updated 1.2021 - v.2021.1
  • USD Price = 299
Training Credit Price = 3 TC
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