Designing FPGAs Using the Vivado Design Suite 1
  • USD Price = 200
Training Credit Price = 2 TC


This content offers introductory training on the Vivado® Design Suite and demonstrates the FPGA design flow for those uninitiated to FPGA design.
The content provides experience with:
  • Creating a Vivado Design Suite project with source files
  • Simulating a design
  • Performing pin assignments
  • Applying basic timing constraints 
  • Synthesizing and implementing 
  • Debugging a design 
View the course description PDF for more details. 
What's new for 2019.2: 
  • Introduction to FPGA Architecture, 3D ICs, SoCs: Description of 20nm FPGA capabilities 
  • HDL Coding Techniques:Auto-pipelining considerations 
  • Vivado Synthesis and Implementation: Clarification on Phys Opt option enablement in the Default implementation strategy 
  • Basics of Static Timing Analysis and Calculating Setup and Hold Timing: Previous Setup and Hold Timing Analysis topic split into these two topics