Designing FPGAs Using the Vivado Design Suite 2
  • USD Price = 200
Training Credit Price = 2 TC


Learn how to build a more effective FPGA design:
The focus is on:
  • Using synchronous design techniques
  • Utilizing the Vivado® IP integrator to create a sub-system
  • Employing proper HDL coding techniques to improve design performance
  • Debugging a design with multiple clock domains
This course builds on the concepts from the Designing FPGAs Using the Vivado Design Suite 1 course.
View the course description PDF for more details.
What's new for 2019.2:
  • UltraFast Design Methodology - Design Creation: Auto-pipelining considerations
  • Designing with the IP Integrator: Additional description of IPI features