Overview

Learn how to improve design speed and reliability by using the

UltraFast Design Methodology and the Vivado® Design Suite.

The focus is on:

Optimizing system reset design and synchronization circuits
Employing best practice HDL coding techniques
Applying appropriate timing closure techniques
Reviewing an UltraFast Design Methodology case study

Updated 9.2020

Courses

UltraFast Design Methodology - Introduction

UltraFast Design Methodology - Board and Device Planning

Vivado Design Suite I/O Pin Planning

Xilinx Power Estimator Spreadsheet

Introduction to FPGA Configuration

UltraFast Design Methodology - Design Creation

Vivado Design Suite - HDL Coding Techniques

Resets

Register Duplication

Pipelining

Synchronous Design Techniques

Creating and Packaging Custom IP

Designing with the IP Integrator

Revision Control Systems in the Vivado Design Suite

UltraFast Design Methodology - Implementation

Vivado Synthesis and Implementation

Incremental Compile Flow

UltraFast Design Methodology - Design Closure

Introduction to Vivado Reports

Baselining

Introduction to Timing Exceptions

Synchronization Circuits

Introduction to Floorplanning

Congestion

Timing Closure Using Physical Optimization Techniques

Power Management Techniques

Vivado Design Suite Debug Methodology

UltraFast Design Methodology Full Course Quiz

Questions?