Xilinx-Prod-LMS Offerings


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Virtual - Accelerating Applications with the Vitis Unified Software Environment
Learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™ unified software environment targeting both data center (DC) and embedded applications. Also learn how to run designs o...

Virtual - Advanced Timing Closure Techniques for the Vivado Design Suite (Hardent version)
Achieving repeatable and reliable timing is the designer’s ultimate goal. The task of writing timing constraints and validating the design against those constraints is commonly referred to as Timing Closure. This pr...

Virtual - Advanced VHDL
Increase VHDL proficiency by learning advanced techniques for writing more robust and reusable code.The focus is on:Writing efficient and reusable RTL, testbenches, and packagesCreating self-testing testbenchesCreatin...

Virtual - ARM Cortex-A53/A57 Software Design (Doulos version)
This course covers software aspects of designing with an ARM Cortex-A53/A57 MPCore based device, highlighting the core architecture details and the programmer?s model. Topics include the ARM AArch64 exceptions model, ...

Virtual - ARM Cortex-A9 for Zynq System Design (Doulos course)
This course covers both the system and software aspects of designing with an ARM? Cortex?-A9 MPCore based device, highlighting the core architecture details and the Xilinx Zynq implementation choices. Topics include t...

Virtual - C Programming for Embedded Systems (Doulos)
C Programming for Embedded Systems teaches the C programming language in the context of embedded systems. As well as giving delegates a full grounding in the C programming language, this course teaches delegates how t...

Virtual - C++ Programming for Embedded Systems (Doulos)
Thiscourse teaches the C++ programming language in the context of real-time andembedded systems. It highlights the resource and performance implications ofusing key C++ features and programming styles. As well as givi...

Virtual - C-based design: High-Level Synthesis with the Vivado HLx Tool
Provides a thorough introduction to the Vivado High-Level Synthesis (HLS) tool.The focus is on:Covering synthesis strategies and featuresImproving throughput, area, interface creation, latency, testbench coding, and c...

Virtual - Comprehensive SystemVerilog (Doulos version)
Comprehensive SystemVerilog provides a complete and integrated training program to fulfil the requirements of design and verification engineers and those wishing to evaluate SystemVerilog's applicability to both desig...

Virtual - Comprehensive Verilog (Doulos version)
Comprehensive Verilog is a 4-day training course teaching the application of the Verilog? Hardware Description Language for FPGA and ASIC design. The syllabus covers the Verilog language, coding for register transfer ...